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CDMA IF VGAs and I/Q Demodulators
with VCO and Synthesizer
AC ELECTRICAL CHARACTERISTICS (continued)
(MAX2306/MAX2308/MAX2309 EV kit, V CC = +2.75V, registers set to default power-up states except M1 = M2 = 306, R1 = R2 = 16,
f IN = 183.7MHz, f REF = 19.2MHz, 0.6Vp-p synthesizer locked with passive 3rd-order lead-lag loop filter, SHDN = high, VGC set for
+35dB voltage gain, differential output load = 10k ? , all power levels referred to 50 ? , T A = +25°C, unless otherwise noted.)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
REF Maximum Divide Ratio
R1, R2
2047
Minimum Phase Detector
Comparison Frequency
Maximum Phase Detector
Comparison Frequency
Phase Noise
(Note 5)
(Note 5)
1kHz offset, T A = -40°C to +85°C
12.5kHz offset, T A = -40°C to +85°C
30kHz offset, T A = -40°C to +85°C
120kHz offset, T A = -40°C to +85°C
900kHz offset, T A = -40°C to +85°C
1500
-79.6
-94.6
-105
-115.3
-125
20
kHz
kHz
dBc/Hz
TURBO LOCK
Acquisition, CPX = XX, TC =1
Locked, CPX = 00
1480
105
2100
150
2650
190
Charge-Pump Source/Sink
Current
Charge-Pump Source/Sink
Matching
Locked, CPX = 01
Locked, CPX = 10
Locked, CPX = 11
Locked, all values of CPX,
0.5V < V CP < V CC - 0.5V
150
210
300
210
300
425
0.2
265
380
530
10
μA
%
Note 1:
Note 2:
Note 3:
Note 4:
Note 5:
Note 6:
FM_IQ and FM_I modes are not available on MAX2309.
Recommended operating frequency range. Contact factory for operating frequency outside this range.
f 1 = 183.7MHz, f 2 = 183.71MHz, P f1 = P f2 = -15dBm.
f 1 = 183.7MHz, f 2 = 183.71MHz, P f1 = P f2 = -50dBm.
Guaranteed by design.
Small-signal gain at 200kHz below the LO frequency will be reduced by less than 0.25dB when an interfering signal at
1.25MHz below the LO frequency is applied at the specified level.
Note 7: f 1 = 183.7MHz, f 2 = 183.71MHz, P f1 = P f2 = -23dBm.
Note 8: f 1 = 183.7MHz, f 2 = 183.71MHz, P f1 = P f2 = -55dBm.
4
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